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Model 71861 Operating Manual − Revision History |
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Date |
Revision |
Comments |
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12/8/16 |
0.1 |
Initial publication |
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2/8/17 |
0.2 |
In General Description − Principle of Operation, Memory, and Model 71861 Specifications, deleted Option 150 − DDR4 memory is standard. |
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5/15/17 |
1.0 |
Updated software description. Register information is only available in the HTML help version of this manual. |
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7/12/17 |
1.1 |
Added Getting the Model 71861 User Manual Library and Updates to It. Added note to DMA. Added memory map addresses for Linked List Descriptor RAM to DMA channels in Data Acquisition. |
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9/19/17 |
1.2 |
Revised Getting the Model 71861 User Manual Library and Updates to It. |
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1/15/18 |
1.3 |
Added maximum power input and power consumption data to Model 71861 Specifications. Revised PMC Connector (Option 104). Revised SW1 default configuration in DIP Switch Settings. Revised diagram in Sync Bus. Moved Navigator BSP section into a separate new chapter. |
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5/18/18 |
1.4 |
Revised Pre−Trigger Control. |