The AXI4−Lite to DDR4 SDRAM Bridge IP Core provides access to the DDR4 SDRAM memory control logic. This core accepts AXI4−Lite DDR4 memory read/write requests and converts these to DDR4 SDRAM AXI4−Stream requests to and responses from the DDR4 SDRAM Interface block.
Click on AXI4-Lite to DDR4 SDRAM Bridge IP Core - DDR4 RAM Access to access register information.
Refer to the Pentek Navigator AXI4−Lite to DDR4 SDRAM Bridge IP Core Manual for a description of this IP module.