There is an AXI4−Stream Merge Core for each ADC channel (ADC0, ADC1, etc.). Each AXI4−Stream Merge Core receives inputs from the associated ADC Interface Core (ADC0, ADC1, etc.) (see ADC Interface) and from the Timestamp Generate Core (see Timestamp Generate) and generates a merged AXI4−Stream output. This core merges the data and timing information into a single stream to be processed by the Channel Data Source Select Cores (see Data Source Select).
Refer to the Pentek Navigator AXI4−Stream Merge IP Core Manual for a description of this IP module.