Timing and Synchronization

The following timing and synchronization options are available for the Model 71861 XMC’s A/D converters:

  • External sample clock: Received from the front panel SSMC connector, labeled CLK. The external clock signal must be a sine wave or square wave of +0 dBm to +10 dBm, with a frequency range from 10 to 800 MHz (must be divided down by CDCM7005 for ADC when greater than 200 MHz).

Ensure that the ADC clock never exceeds the ADS5485 rated clock speed during any change of frequency with the input clock signal. (For details, refer to Clock Input Connector.)
  • Onboard crystal oscillator: Alternately, the sample clock can be sourced from an onboard programmable voltage−controlled crystal oscillator (VCXO). In this mode, the front panel SSMC connector (labeled CLK) can be used to provide a 10 MHz reference clock for synchronizing the internal oscillator.
  • 26−pin sync bus front panel connector: This connector (labeled SYNC/GATE) allows multiple modules to be synchronized. It provides clock, sync, and gate input/output pins for the Low−Voltage Positive Emitter−Coupled Logic (LVPECL) Sync Bus. When the Model 71861 is a bus Master, these pins output LVPECL Sync Bus signals to other slave units. When the Model 71861 is a bus Slave, these pins input LVPECL signals from a bus Master. This connector also accepts two Low−Voltage TTL (LVTTL) Gate/Sync inputs. The mating 26−pin connector is Pentek part # 353.02607 (Model 2140−998). For a description of the SYNC/GATE connector pin configuration, refer to SYNC/GATE Connector Pins.
  • External trigger input: Received from the front panel SSMC coaxial connector, labeled TRIG. The external trigger signal must be an LVTTL signal. The trigger input can be used as a gate or trigger for A/D signal processing.

The front panel TTL Gate and Sync signals are 5V tolerant but they must not have any negative voltage applied. They are terminated with a 392−ohm resistor to 3.3V and a 392−ohm resistor to ground.

When connecting LVPECL Sync Bus pins to additional Model 71861 modules, the LVPECL pins on the LAST unit must be terminated. Pentek includes a terminating board (part # 002.71504, Model 2140−999) with your shipment for this purpose.