The FPGA reserves a block of addresses for user registers/storage for custom processing of data by the User Blocks. In the default FPGA configuration these addresses perform no functions, but are available as read/write temporary storage. You can read and write any type of data to each address.
|
Base Address |
Module |
Description |
Reference |
|---|---|---|---|
|
0x0300_0000 |
User Block 1 |
User Register Space |
|
|
0x0380_0000 |
User Block 2 |
User Register Space |