Intro: (top)
The mock spectrometers functionality
includes:
- 12 bit time domain sampling
- complex digital down conversion
- digital lowpass filtering
- Truncation to 4,8, or 16 bits before output.
For radar sampling we use
- IF input at 30 MHZ
- Signal comes it at 30 MHZ IF.
- sample this signal at 160 Mhz with a single a/d of the
mocks
- Digitally mix the signal from 30 MHZ down
to DC
- digital filter to 32,20,10,5,1,.5,.25 or .156250 Mhz.
- Output the data as 4 or 8 bits (16 hasn't been looked
at yet).
- IF input at 280 MHZ
- Signal comes in at 280 MHz
- Sample this at 160 MHz
- This sampling will digitally down convert the signal
to 40 MHz (160*2-280 = 40 Mhz)
- Digitally mix the signal from 40 MHZ down
to DC
- digital filter to 40,32,20,10,5,1,.5,.25 or .156250
Mhz.
- Output the data as 4 or 8 bits (16 hasn't been looked
at yet).
This currently runs on the pdevs0
fileserver.
More
detail on how the data taking works: top)
The setup for IF sampling is a little
different than the standard astronomy setup:
- The mock clock is run at 160 MHz.
- A single digitizer is used to
sample the IF at 30 MHz
- The mock mixers are not used.
- The mock variable attenuators are in the mixer
chassis, so there are no mock variable attenuators.
- A configuration option forces zero in the unused
digitizer (normally Q).
- This will cause an image of the band at -30 MHz
- A complex digital mixer
moves 30 MHz down to DC.
- the digital oscillator is 11 bits. (2048 levels)
- The 30MHz LO to move 30MHz to DC is:
- 30MhzLO= n/2048 * clock
- n=30*2048/clock@160 = 384
- (this is why i picked 160 MHz, it gets 30 exactly to
DC)
- The Q channel had 0 in it. After mixing, the i,q have
equal power.
- For simulating the processes, the i,q now have a
factor of 2 less in voltage than the normal i/q
sampling.
- The mixing moves the -30 MHz image to -60 MHz.
- The digital filter can then
filter to the desired bandwidth:
- We need to remove the image at -60 MHz (-50 to -70 if
20 MHz bw).
- The decimation can be 5 to 1024 in steps of 1.
- Decimate by 5 will give a 32 MHz bw.
- this will have power in -16 to +16 Mhz. So the
image at -60 MHz will be pretty far down.
-
Bandwidths
for dec at 160 MHz clock
decimation
|
bandwidth MHz
|
4
|
40
|
5
|
32
|
8
|
20
|
16
|
10
|
32
|
5
|
160
|
1
|
320
|
.5
|
640
|
.25
|
1024 (max decimation)
|
156250
|
-
- I've used the hanning filter type (others are
available).
- Packing to 4 , 8 bits
- The filtering is done in a 26 bit register.
- The signal grows as the sqrt(decimation) as long as
it is noise.
- We will normally have a noise bandwidth of 20 or 25
MHz bw.
- For the first few filter steps: 2,3,4,5 the rms will
grow linearly since there is no power being removed.
- After filtering, the 26 Bit register is upshifted by a
programmable number of bits.
- The upper most 4 or 8 bits are then used for the 4 or
8 bit sample
- Outputting the data
- The packed data is output to disc.
- The data path is:
- fgpa -> powerpcInspectrometer -> 1gbit
ethernet -> fileserver
- DMA transfers are used fgpa -> powerPc
- These transfers have a block size (the packet
keyword defined in the .conf configuration file)
- The block size is currently set to 0x100000 (1 MByte)
for all setups.
- The time resolution for data taking is set by this
block size.
- For 4bit 2 pols, 20Mhz this is 26
milliseconds
- for 8bit 2pols .156 Mhz bw this is 1.67 seconds.
- So we'll need to define the datataking time
resolution need and then change the block size for
different bandwidths.
- Setting up the levels:
- The 12 bit digitizer has .787 Volts peak
to peak.
- The rms for optimal 4bit sampling is 2.98 levels = 1
sigma.
- For normal 4 bit sampling the voltage level would
be:
- .787/16 * 2.98 = .147 Volts for 1 sigma
- It took me awhile to realize that we don't need to
have the input voltage at .147 Volts.
- The digitizer, mixer, filter are all 12 or 16 bits.
the 4 or 8 bits doesn't enter in till the very end of
the processing.
- Here is why we don't want to use an input level of
.147 volts:
- Dana claims the digitizer board can probably
handle .9Volts rms without burning anything up.
- If the input is .147 Volts, then it would be very
easy for the signal to get to 1 volt when the
transmitter came on.
- The up shift during the packing stage can be used as
a programmable gain (in units of 6db).
- So we can pick a much lower input level (say
60millivolts) and then use the up shift at the end to
put the signal into our 4 bits.
- We need to remember that:
- the rms reported at the digitizer is no longer
the rms that will be put into the upper most bits (we
need to have some table to say what the input voltage
should be)
- The filtering increases the rms at sqrt(decimation).
- The up shift we use to position the bits has a
resolution of 2 (in voltage) .
- We'll probably need to use different input
voltages for some of the decimations.
Specs
The table below summarizes some of the setup values used
table for 4bit
sampling
BW
|
dec
|
30Mhz IF
input @ 30Mhz
|
40MHZ IF
input @ 280Mhz
|
|
|
shift
|
inpV
mV
|
a/d rms
counts
|
prgRms
counts
|
shift
|
inpV
mV
|
a/d rms
coutns
|
prgRms
counts
|
40
|
4
|
13?
|
59
|
1.012?
|
3.09
|
14
15
|
214
100
|
.714
.357
|
3.005
2.93 (1)
|
32
|
5
|
13
|
59
|
1.012
|
3.09
|
15
|
97
|
.338
|
3.001
|
20
|
8
|
12
|
78
|
1.329
|
2.98
|
13
14
15
15
|
335
154
75
49
|
1.102
.527
.270
.292
|
2.978
2.976
2.98 (2)
2.83 (3)
|
10
|
16
|
12
|
55
|
.914
|
2.91
|
14
|
109
|
.384
|
3.009
|
5
|
32
|
11
|
81
|
1.408
|
3.15
|
13
|
148
|
.535
|
2.977
|
1
|
160
|
10
|
70
|
1.216
|
3.05
|
|
|
|
|
.5
|
320
|
10
|
51
|
.856
|
3.026
|
|
|
|
|
.25
|
640
|
9
|
68
|
1.187
|
2.995
|
|
|
|
|
.156250
|
1024
|
9
|
54
|
.914
|
2.908
|
|
|
|
|
- 1. 20 mhz pad after 260 Mhz amps for protection, amps at
12dbm output
- 2. 20 mhz pad after 260 Mhz amps for protection, amps at
10dbm output
- 3. 21jan14: 20 Mhz pad after 260 Mhz amps for protection
- 20Mhz code (16mv) + noise = 49 mv). 30 secs of data
Testing radar datataking:
- Notes on the testing setup:
- You need to put a filter between the noise source and
the 260 Mhz amplifiers.
- If not, the broad band noise will swamp the 260 Mhz
amps
- This filter needs pads on each side to reduce the
ripples in the bandpass
- When using the scope to measure the rms voltage, use
ac coupling to get rid of the ac ripple.
- Use a power splitter to add any code to the noise
signal.
- Do this after the 260 Mhz amps of the noise.
- You can put a 20db pad after the 260Mhz amps to make
sure the transmitter signal (in real life) does not
smash the a/d's (the max output of the 260 amps is
around 22dbm.).,
- 31oct13: 4 bit datataking
varying decimation,input voltage, upshift
- This sampled at 160 Mhz.
- The input signal was centered at 30 Mhz IF.
- Histograms were made of each dataset
- rms results for all runs as well as a comparison of
simulated runs were made.
- For those runs with 4bit rms close to optimum, the
results were displayed as well had plots of the bandpass
- 11dec13 : 4 280
-> 40 Mhz histograms and spectra
- clock run at 160 Mhz
- The input source was centers at 280 Mhz
- noise source followed by 40 Mhz bw filter centered
at 280 Mhz
- Histograms and average spectra were made of each
dataset
- Different bandwidths, input voltages, and mock shifts
were tried.
- 21jan14: 4bit
280->40 Mhz using 20Mhz pncode.
- clock at 160Mhz
- The input source was centers at 280 Mhz
- noise source followed by 40 Mhz bw filter centered
at 280 Mhz
- a 20Mhz 64K pncode was added to the noise.
- 30 seconds of data was taken
- Histograms, average spectra, and energy plots were
made.
idl code
- Simulating pdev
timedomain sampling.
- the idl routine pdevsimtmd() can simulate time domain
sampling with the mocks (more
info)
- To use the routine:
- idl
- @phil
- @pdevinit
- explain,pdevsimtmd
- Check histogram of 4bit data,
plot average spectra:
- on aonet, run idl
- idl
- @phil
- @pdevinit
- edit /share/megs/phil/x101/pdev/sbtmd/pro/chkfile.pro
- enter filename to process
- .run chkfile
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