/** $Workfile: if020000.h $ $Revision: 2.29 $ $Date: 10 Aug 1993 11:07:52 $ Description: include file for TransPort system definitions $Log: C:\pvcs\logfiles\if020000.h_v $ Rev 2.29 10 Aug 1993 11:07:52 RGG added ERR_Mod_IOHWFailure (0x4E) for module i/o sub-system error Rev 2.28 08 Jul 1993 14:12:16 RGG added MID_IC0032 (080h) and MID_MC0032 (081h) added defines for H-Drive I/O modules and IOP interfaces Rev 2.27 29 Dec 1992 13:34:08 RGG added gethisegtpt() and sethisegtpt() to change segments for MSWindows added gethibrdptrtpt() to get address of board structure eliminated SMALL, MEDIUM, LARGE model requirements added board structures for PCAT, VME Corp, RadiSys, XYCOM interfaces added ERR_BoardShadowed (0xF7) error code Rev 2.26 15 Oct 1992 16:20:12 RGG added BIT_Disable_Xmitter to enable/disable modem Rev 2.25 25 Sep 1992 15:08:26 RGG changed BIT_AOR_Avail to BIT_AOR_NotAvail changed BIT_DOR_Avail to BIT_DOR_NotAvail added sethitotpt() to change host interface timeout for low-levels Rev 2.24 10 Sep 1992 11:19:02 RGG added comments for DPR defines Rev 2.23 10 Sep 1992 11:04:46 RGG added MID_DO0416 (0x28) & MID_DO0416M (0x29) as 120 VDC output modules Rev 2.22 03 Sep 1992 17:47:54 RGG added OFF_Error_Filter to filter BC errors (0 to 127) fixed prototype of inittbltpt() - swapped 'ioport' with 'segment' Rev 2.21 06 Aug 1992 7:34:58 RGG added ERR_ChecksumFailure (0xF6) error code Rev 2.20 12 Jun 1992 9:06:06 RGG added ERR_DMAFailure (0xF5) error code Rev 2.19 29 May 1992 12:08:20 RGG added ERR_ModemFailure (0xF4) error code Rev 2.18 06 May 1992 18:30:42 RGG added text info for module ids (MID_) added text info for base ids (BID_) renamed getswver() to gethiver() Rev 2.17 28 Sep 1991 13:41:24 RGG changed getswvertpt() to gethivertpt() of HI drivers deleted dtacmptpt() & bitfloptpt() from function definitions since functions were deleted from HI drivers deleted DO4816 modules from MID list fixed MID_DO0216M (id 0x23) because 'M' was left off name Rev 2.16 28 Sep 1991 11:49:26 RGG added MID_DO0216 (id 0x21) & MID_DO0216M (id 0x23) as isolated universal DC output modules Rev 2.15 26 Jul 1991 3:18:50 RGG changed ERR_Mod_InvIOCircuit (0x4B) to ERR_Mod_DataRange for 4-20 mA AIN Rev 2.14 14 Mar 1991 9:03:06 RGG added serial port info (baud rate, parity, stop bits, & node address) to DPR added Clear NOVRAM opcode added Setup Communications Port opcode added interface hardware id codes (IID_XXX) Rev 2.13 29 Aug 1990 11:31:12 RGG added function call and data size control via top-level include files (IF02L000.H, IF02M000.H, IF02S000.H) added chkopntpt() function for checking if IIOP access is open, which is a better replacement than calling opnactpt() before checking Rev 2.12 14 Aug 1990 10:27:14 RGG added configuration control for host determination of ability to disable broadcast after power up. Rev 2.11 14 Aug 1990 9:39:46 RGG added Disable Broadcast on Power Up control bit, which is to be used for 40Ps. Rev 2.10 26 Apr 1990 9:13:02 RGG added min and max scan time defines Rev 2.9 02 Mar 1990 14:44:36 RGG changed BIT_Extra_Listen_Time to BIT_Disable_Listen_Time (high true) added same bit definition to CFG byte Rev 2.8 28 Feb 1990 10:43:16 RGG added BIT_Extra_Listen_Time to add 2-3 mSec for listener while in B/C Rev 2.7 27 Feb 1990 9:52:02 RGG added AC counter modules added Fischer & Porter OEM code (32h - FNP_Specific) Rev 2.6 20 Feb 1990 10:41:34 RGG updated DO0016, DO0016M, DO0116 and DO0116M because of confusion in number deleted all current combo modules, but added CO0016 and CO0116 as replacements added times for the CO0016 and CO0116 modules Rev 2.5 22 Dec 1989 11:06:38 RGG added comm timer error statuses Rev 2.4 25 Oct 1989 15:32:30 RGG added new control bits for synch mode general cleanup Rev 2.3 04 Sep 1989 19:19:48 RGG added new error codes added routines 'reqacctpt()' and 'chkacctpt()' added TE09 and TE10 bases Rev 2.2 04 Aug 1989 10:57:44 RGG fixed error code numbers for TK functions (had 'h' from assembly). Rev 2.1 02 Aug 1989 15:47:18 RGG added tool kit error codes added number-of-scans fixed miscellaneous SOM_ and SOR_ bugs Rev 2.0 30 Jun 1989 8:04:04 RGG Initial revision. **/ #ifndef TPT_LL_System /* file already included ? */ #define TPT_LL_System /* if not, make sure it is not */ /*****************************************************************************/ /* the following defines the current version of this file. */ /* */ /*****************************************************************************/ #define TPT_LL_System_File_Version 0x0229 /* version 2.29 */ /*****************************************************************************/ /* the following are defined to be the offset, locations and bit maps of */ /* the 64 KByte DPR of the IIOP interface board. */ /*****************************************************************************/ /* */ /* OFF_ - offset from the ZERO (0) base of the Shared Memory image */ /* LOC_ - location of the data within previously defined OFF_ parameter */ /* BIT_ - access to a bit of the previosly defined LOC_ parameter */ /* SIZ_ - size (in bytes) of the parameter */ /* */ /*****************************************************************************/ #define OFF_Brd_Verification 0x0000 #define BIT_Brd_Verification 0x55AA #define SIZ_Brd_Verification 0x0002 #define OFF_Control_Register 0x0002 #define BIT_New_Command_Avail 0x0001 #define BIT_New_Outputs_Avail 0x0004 #define BIT_Process_Synch_Scan 0x0020 #define BIT_Enable_Synch_Mode 0x0040 #define BIT_Enable_Extern_Config 0x0080 #define BIT_Auto_Man_ReStart 0x0200 #define BIT_Disable_Xmitter 0x1000 #define BIT_NDP_Usage_Enable 0x2000 #define BIT_NOVRAM_Usage_Enable 0x4000 #define BIT_Host_Int_Enable 0x8000 #define SIZ_Control_Register 0x0002 #define OFF_Status_Register 0x0004 #define BIT_Processing_Command 0x0001 #define BIT_Error_Current_Cmd 0x0002 #define BIT_Scan_Completed 0x0004 #define BIT_NDP_Available 0x2000 #define BIT_NOVRAM_Available 0x4000 #define SIZ_Status_Register 0x0002 #define OFF_Minimum_Scan_Time 0x0006 #define BIT_MinScanTime 5 #define BIT_MaxScanTime 250 #define SIZ_Minimum_Scan_Time 0x0002 #define OFF_Number_CRC_Error 0x0008 #define SIZ_Number_CRC_Error 0x0002 #define OFF_Number_TO_Error 0x000A #define SIZ_Number_TO_Error 0x0002 #define OFF_MM_Software_Version 0x000C #define SIZ_MM_Software_Version 0x0002 #define OFF_CH_Software_Version 0x000E #define SIZ_CH_Software_Version 0x0002 #define OFF_Current_IIOP_Address 0x0010 #define SIZ_Current_IIOP_Address 0x0001 #define OFF_IIOP_OEM_Number 0x0011 #define SIZ_IIOP_OEM_Number 0x0001 #define OFF_Current_IIOP_Mode 0x0012 #define SIZ_Current_IIOP_Mode 0x0002 #define OFF_Available_IIOP_Modes 0x0014 #define SIZ_Available_IIOP_Modes 0x0002 #define OFF_Current_IIOPMM_Status 0x0016 #define SIZ_Current_IIOPMM_Status 0x0001 #define OFF_Current_IIOPCH_Status 0x0017 #define SIZ_Current_IIOPCH_Status 0x0001 #define OFF_Configuration_Status 0x0018 #define SIZ_Configuration_Status 0x0001 #define OFF_Module_In_Error 0x0019 #define SIZ_Module_In_Error 0x0001 #define OFF_NOVRAM_Status 0x001A #define SIZ_NOVRAM_Status 0x0001 #define OFF_Interface_Status 0x001B #define SIZ_Interface_Status 0x0001 #define OFF_Number_Scans 0x001C #define SIZ_Number_Scans 0x0002 #define OFF_Minimum_Scan_Run_Time 0x001E #define SIZ_Minimum_Scan_Run_Time 0x0002 #define OFF_TransNet_Status 0x0020 #define SIZ_TransNet_Status 0x0001 #define OFF_System_Config 0x0021 #define BIT_20_MicroSec 0x00 #define BIT_52_MicroSec 0x01 #define BIT_Fast_Scan_Enable 0x02 #define BIT_Broadcast_Disable 0x04 #define SIZ_System_Config 0x0001 #define OFF_BaudRate 0x0022 #define BIT_1200_Baud 0x0060 #define BIT_2400_Baud 0x0030 #define BIT_4800_Baud 0x0018 #define BIT_9600_Baud 0x000C #define BIT_19200_Baud 0x0006 #define BIT_38400_Baud 0x0003 #define BIT_57600_Baud 0x0002 #define BIT_115200_Baud 0x0001 #define SIZ_BaudRate 0x0002 #define OFF_SerialMode 0x0024 #define BIT_8DataBits 0x03 #define BIT_DataBits 0x03 #define BIT_1StopBit 0x00 #define BIT_2StopBits 0x04 #define BIT_StopBits 0x04 #define BIT_NoParity 0x00 #define BIT_OddParity 0x08 #define BIT_EvenParity 0x18 #define BIT_ParityBits 0x38 #define SIZ_SerialMode 0x0001 #define OFF_NodeAddress 0x0025 #define SIZ_NodeAddress 0x0001 #define OFF_Error_Filter 0x0026 #define SIZ_Error_Filter 0x0001 #define OFF_Mod_Config_Table 0x0040 #define LOC_Mod_EAROM_Image 0x0000 #define LOC_Mod_Address 0x0000 #define SIZ_Mod_Address 0x0001 #define LOC_Mod_Comm_Type 0x0001 #define BIT_Mod_BC_Enable 0x80 #define SIZ_Mod_Comm_Type 0x0001 #define LOC_Mod_EAROM_Rev_Num 0x0002 #define LOC_Mod_EAROM_Mnr_Rev 0x0002 #define SIZ_Mod_EAROM_Mnr_Rev 0x0001 #define LOC_Mod_EAROM_Mjr_Rev 0x0003 #define SIZ_Mod_EAROM_Mjr_Rev 0x0001 #define SIZ_Mod_EAROM_Rev_Num 0x0002 #define LOC_Mod_ID_Num 0x0004 #define SIZ_Mod_ID_Num 0x0001 #define LOC_Mod_OEM_Num 0x0005 #define SIZ_Mod_OEM_Num 0x0001 #define LOC_Mod_Comm_Loss_Time 0x000A #define SIZ_Mod_Comm_Loss_Time 0x0001 #define LOC_Mod_Comm_Loss_Mul 0x000B #define SIZ_Mod_Comm_Loss_Mul 0x0001 #define LOC_Mod_Tx_Time 0x000C #define SIZ_Mod_Tx_Time 0x0004 #define LOC_Mod_Rx_Time 0x0010 #define SIZ_Mod_Rx_Time 0x0004 #define SIZ_Mod_Time_Data 0x000A #define LOC_Mod_Specific_Data 0x0014 #define LOC_DI_Data_Control 0x0000 #define BIT_DI_Logic_Sense 0x01 #define SIZ_DI_Data_Control 0x0001 #define LOC_DI_Counter_Enables 0x0001 #define SIZ_DI_Counter_Enables 0x0001 #define LOC_DI_Latch_Enables 0x0002 #define SIZ_DI_Latch_Enables 0x0004 #define LOC_DI_Filter_Times 0x0006 #define SIZ_DI_Filter_Times 0x0020 #define LOC_DO_Power_Up_Defaults 0x0000 #define SIZ_DO_Power_Up_Defaults 0x0004 #define LOC_DO_Comm_Loss_Defaults 0x0004 #define SIZ_DO_Comm_Loss_Defaults 0x0008 #define LOC_DO_Filter_Times 0x000C #define SIZ_DO_Filter_Times 0x0020 #define LOC_AI_Degrees_Control 0x0000 #define SIZ_AI_Degrees_Control 0x0000 #define LOC_AI_Statistics_Control 0x0002 #define SIZ_AI_Statistics_Control 0x0001 #define LOC_AI_Channel_Type_Gain 0x0004 #define SIZ_AI_Channel_Type_Gain 0x0010 #define LOC_AI_Filter_Times 0x0014 #define SIZ_AI_Filter_Times 0x0010 #define LOC_AO_Channel_Type 0x0000 #define SIZ_AO_Channel_Type 0x0002 #define LOC_AO_Power_Up_Defaults 0x0002 #define SIZ_AO_Power_Up_Defaults 0x0020 #define LOC_AO_Comm_Loss_Defaults 0x0022 #define SIZ_AO_Comm_Loss_Defaults 0x0020 #define LOC_AO_Comm_Loss_Hold 0x0042 #define SIZ_AO_Comm_Loss_Hold 0x0002 #define LOC_CO_Data_Control 0x0000 #define BIT_CO_Logic_Sense 0x01 #define SIZ_CO_Data_Control 0x0001 #define LOC_CO_Latch_Enables 0x0002 #define SIZ_CO_Latch_Enables 0x0001 #define LOC_CO_Filter_Times 0x0004 #define SIZ_CO_Filter_Times 0x0008 #define LOC_CO_Power_Up_Defaults 0x000C #define SIZ_CO_Power_Up_Defaults 0x0001 #define LOC_CO_Comm_Loss_Defaults 0x000E #define SIZ_CO_Comm_Loss_Defaults 0x0002 #define SIZ_Mod_Specific_Data 0x005C #define SIZ_Mod_EAROM_Image 0x0070 #define LOC_Chnl_Descr_Data 0x0070 #define LOC_Number_AI 0x0000 #define SIZ_Number_AI 0x0001 #define LOC_Number_DI 0x0001 #define SIZ_Number_DI 0x0001 #define LOC_Number_AO 0x0002 #define SIZ_Number_AO 0x0001 #define LOC_Number_DO 0x0003 #define SIZ_Number_DO 0x0001 #define LOC_Special_Index 0x0004 #define SIZ_Special_Index 0x0001 #define LOC_Channel_Type 0x0005 #define BIT_No_Mod_Available 0x00 #define BIT_AI_Avail 0x01 #define BIT_DI_Avail 0x02 #define BIT_AI_DI_Avail 0x03 #define BIT_AO_Avail 0x04 #define BIT_AI_AO_Avail 0x05 #define BIT_AO_DI_Avail 0x06 #define BIT_AI_AO_DI_Avail 0x07 #define BIT_DO_Avail 0x08 #define BIT_AI_DO_Avail 0x09 #define BIT_DI_DO_Avail 0x0A #define BIT_AI_DI_DO_Avail 0x0B #define BIT_AO_DO_Avail 0x0C #define BIT_AI_AO_DO_Avail 0x0D #define BIT_AO_DI_DO_Avail 0x0E #define BIT_AI_AO_DI_DO_Avail 0x0F #define BIT_AOR_NotAvail 0x10 #define BIT_DOR_NotAvail 0x20 #define BIT_Special_Mod 0x80 #define SIZ_Channel_Type 0x0001 #define SIZ_Chnl_Descr_Data 0x0006 #define LOC_Undefined_Filler 0x0076 #define SIZ_Undefined_Filler 0x000A #define LOC_NDP_Coefficients 0x0080 #define LOC_NDP_M_Coefficients 0x0000 #define SIZ_NDP_M_Coefficients 0x0004 #define LOC_NDP_B_Coefficients 0x0004 #define SIZ_NDP_B_Coefficients 0x0004 #define SIZ_NDP_Coefficients 0x0080 #define SIZ_Mod_Config_Table 0x0100 #define OFF_Mod_NDP_Enables 0x7E40 #define BIT_Process_NDP_On_Inputs 0x01 #define SIZ_Mod_NDP_Enables 0x0078 #define OFF_Mod_Tx_Order 0x7EB8 #define BIT_Max_Modules 0x78 #define SIZ_Mod_Tx_Order 0x0078 #define OFF_Mod_Rx_Order 0x7F30 #define SIZ_Mod_Rx_Order 0x0078 #define OFF_Mod_Status_Table 0x7FA8 #define LOC_Current_Status 0x0000 #define LOC_Last_Status 0x0001 #define SIZ_Mod_Status_Data 0x0002 #define SIZ_Mod_Status_Table 0x00FC #define OFF_Chnl_Status_Table 0x80A4 #define LOC_Chnl_Status_Bits 0x0000 #define SIZ_Chnl_Status_Bits 0x0004 #define SIZ_Chnl_Status_Table 0x01E0 #define OFF_Message_Buffer 0x8284 #define LOC_Msg_Bfr_Byte_Count 0x0000 #define SIZ_Msg_Bfr_Byte_Count 0x0002 #define LOC_Msg_Bfr_Mod_Address 0x0002 #define SIZ_Msg_Bfr_Mod_Address 0x0001 #define LOC_Msg_Bfr_Mjr_Opcode 0x0003 #define SIZ_Msg_Bfr_Mjr_Opcode 0x0001 #define LOC_Msg_Bfr_Mnr_Opcode 0x0004 #define SIZ_Msg_Bfr_Mnr_Opcode 0x0001 #define SIZ_Message_Buffer 0x0400 #define OFF_Response_Buffer 0x8684 #define LOC_Rsp_Bfr_Byte_Count 0x0000 #define SIZ_Rsp_Bfr_Byte_Count 0x0002 #define LOC_Rsp_Bfr_Mod_Address 0x0002 #define BIT_Address_Error 0x80 #define SIZ_Rsp_Bfr_Mod_Address 0x0001 #define LOC_Rsp_Bfr_Mjr_Opcode 0x0003 #define SIZ_Rsp_Bfr_Mjr_Opcode 0x0001 #define LOC_Rsp_Bfr_Mnr_Opcode 0x0004 #define SIZ_Rsp_Bfr_Mnr_Opcode 0x0001 #define LOC_Rsp_Bfr_Status_WMnr 0x0005 #define SIZ_Rsp_Bfr_Status_WMnr 0x0001 #define LOC_Rsp_Bfr_Status 0x0004 #define SIZ_Rsp_Bfr_Status 0x0001 #define SIZ_Response_Buffer 0x0400 #define OFF_Memory_Window 0x8A84 #define SIZ_Memory_Window 0x1000 #define OFF_IO_Data_Tables 0x9A84 #define LOC_Mod_IO_Table 0x0000 #define LOC_Basic_AI_Table 0x0000 #define LOC_Combo_AI_Table 0x0000 #define LOC_Mixed_AI_Table 0x0000 #define LOC_Basic_AO_Table 0x0040 #define LOC_Combo_AO_Table 0x0040 #define LOC_Mixed_AO_Table 0x0040 #define LOC_Basic_DI_Table 0x0000 #define LOC_Combo_DI_Table 0x0000 #define LOC_Mixed_DI_Table 0x0080 #define LOC_Basic_DO_Table 0x0040 #define LOC_Combo_DO_Table 0x0040 #define LOC_Mixed_DO_Table 0x00C0 #define SIZ_Input_Table 0x0040 #define SIZ_Output_Table 0x0040 #define SIZ_Mod_IO_Table 0x0080 #define SIZ_IO_Data_Tables 0x3F00 #define OFF_Brd_Verification2 0xFFF0 #define BIT_Brd_Verification2 0x55AA #define SIZ_Brd_Verification2 0x0002 /*****************************************************************************/ /* the following are defined to be the errors that are returned into the */ /* Module Status bytes by the IIOP. */ /*****************************************************************************/ #define ERR_StatusOK 0x00 /*****************************************************************************/ /* this section defines the errors returned by the modules. */ /* NOTE: the MSB of these defines MUST NOT be set. */ /*****************************************************************************/ #define ERR_Mod_EAROMRW 0x01 /* EAROM Read/Write Error */ #define ERR_Mod_EAROMCRC 0x02 /* EAROM CRC Error */ #define ERR_Mod_InvalidBase 0x03 /* Module Invalid For Base */ #define ERR_Mod_EAROMMaxWrite 0x04 /* EAROM Exceeded Maximum Writes*/ #define ERR_Mod_InvalidVersion 0x05 /* Module Map Version Level diff*/ #define ERR_Mod_InvalidOEM 0x06 /* Module OEM diff from base */ #define ERR_Mod_InvalidAddr 0x07 /* Invalid address in EAROM */ #define ERR_Mod_InvEAROM_W_Comp 0x08 /* Module EAROM bad w/ comp */ #define ERR_Mod_InvEAROM_WO_Comp 0x09 /* Module EAROM bad w/o comp */ #define ERR_Mod_InvalidChnls 0x0A /* Channel Configuration Invalid*/ #define ERR_Mod_InvalidTime 0x0B /* Communications Times Invalid */ #define ERR_Mod_CommTimedOut 0x40 /* Module detected Comm Time Out*/ #define ERR_Mod_RxInvCRC 0x41 /* Module detected CRC errors */ #define ERR_Mod_RxInvCmd 0x42 /* Invalid command received */ #define ERR_Mod_RxInvCnt 0x43 /* Invalid count received */ #define ERR_Mod_RxInvData 0x44 /* Invalid data received */ #define ERR_Mod_IOSysNotEna 0x45 /* I/O processing not enabled */ #define ERR_Mod_DidNotRxBC 0x46 /* Module did not rcv B/C data */ #define ERR_Mod_RxInvBCCnt 0x47 /* Module rcvd bad count in B/C */ #define ERR_Mod_RxInvBCCRC 0x48 /* Module rcvd bad CRC in B/C */ #define ERR_Mod_RxInvBCAddr 0x49 /* Module rvcd bad addr in B/C */ #define ERR_Mod_Readbacks 0x4A /* Output readbacks incorrect */ #define ERR_Mod_DataRange 0x4B /* Module has data out of range */ #define ERR_Mod_InvIOEAROMCRC 0x4C /* Module has I/O EAROM CRC err */ #define ERR_Mod_InvIOEAROM 0x4D /* Module has invalid I/O EAROM */ #define ERR_Mod_IOHWFailure 0x4E /* Internal/External H/W failure*/ /*****************************************************************************/ /* this section defines the errors determined by the IIOP for the modules */ /* or of itself. */ /* NOTE: the MSB of these defines MUST be set. */ /*****************************************************************************/ #define ERR_IOP_CommTimedOut 0x80 /* Comm Timed Out/Not Responding*/ #define ERR_IOP_RxInvCRC 0x81 /* IIOP received Bad CRC */ #define ERR_IOP_RxInvCmd 0x82 /* IIOP received invalid command*/ #define ERR_IOP_RxInvRsp 0x83 /* IIOP received invalid resp */ #define ERR_IOP_RxInvCntRsp 0x84 /* IIOP rvcd invalid rsp count */ #define ERR_IOP_NewModeInvalid 0x85 /* new mode not currently valid */ #define ERR_IOP_InvScanList 0x86 /* Invalid scan list */ #define ERR_IOP_InvModCnfg 0x87 /* Invalid module configuration */ #define ERR_IOP_InvConfig 0x88 /* Other error caused bad config*/ #define ERR_IOP_DPRNotCnfg 0x89 /* DPR not configured for cmd */ #define ERR_IOP_ModNotCnfg 0x8A /* Module not configured for cmd*/ #define ERR_IOP_CmdInvInMode 0x8B /* Command invalid in mode */ #define ERR_IOP_MemoryOffset 0x8C /* Memory offset illegal */ #define ERR_NOVRAM_NotAvail 0x8D /* NOVRAM not available */ #define ERR_NOVRAM_NoConfig 0x8E /* NOVRAM available w/no config */ #define ERR_NOVRAM_BadConfig 0x8F /* NOVRAM available w/bad config*/ #define ERR_OEM_InvConfigParam 0x90 /* OEM config has invalid param */ #define ERR_SYS_ModNotInScanList 0x91 /* Module not in scan list */ #define ERR_SYS_DataDPRMismatch 0x92 /* Chk'd data & DPR do not match*/ #define ERR_IOP_InterfaceInactive 0x93 /* Host Interface not active */ #define ERR_SYS_RxInvAddr 0x94 /* Address used is not valid */ #define ERR_SYS_RxInvOpcRsp 0x95 /* Rsp opcodes diff from Msg */ #define ERR_IOP_RxInvCntMsg 0x96 /* IIOP rcvd inv msg byte count */ #define ERR_IOP_LinkNotChecked 0x97 /* IIOP has not checked link yet*/ #define ERR_IOP_LinkTimedOut 0x98 /* IIOP detected link timed out */ #define ERR_IOP_LinkWasReset 0x99 /* IIOP got ctrl after link dead*/ /*****************************************************************************/ /* the following are defined to be the errors that are returned by the */ /* Tool Kit routines */ /*****************************************************************************/ #define ERR_TK_BadParameter 0xD0 /* bad parameter in function */ #define ERR_TK_CmdInit 0xD1 /* command initialization error */ #define ERR_TK_ComRespTimeOut 0xD2 /* com/resp time out in function*/ #define ERR_TK_FileNotFound 0xD3 /* specified file not found */ #define ERR_TK_BadTypeOrVersion 0xD4 /* file of bad type of inc ver */ #define ERR_TK_FileCorrupt 0xD5 /* data corrupt or not readable */ /*****************************************************************************/ /* the following are defined to be the values that are returned from */ /* the previously defined functions (also status in DPR). */ /*****************************************************************************/ #define ERR_InvalidPort 0xE0 /* port address not correct */ #define ERR_InvalidPage 0xE1 /* page address not correct */ #define ERR_MemManagerInternal 0xE2 /* memory manager indicates err */ #define ERR_CommHandlerInactive 0xE3 /* comm handler not active */ #define ERR_IIOPSharedMemory 0xE4 /* IIOP indicates DPR error */ #define ERR_HostSharedMemory 0xE5 /* Host side of DPR in error */ #define ERR_BoardTimeOut 0xE6 /* IIOP not responding */ #define ERR_BoardInReset 0xE7 /* board is in reset mode */ #define ERR_IncorrectVersion 0xE8 /* incorrect ver of S/W in IIOP */ #define ERR_InvalidBrdNum 0xE9 /* invalid board access number */ #define ERR_BoardNotInit 0xEA /* board has not been init'ed */ #define ERR_BoardNotClsd 0xEB /* board waiting for release */ #define ERR_InvalidByteCt 0xEC /* too many bytes requested */ #define ERR_AccessNotOpen 0xED /* DPR not opened for stream */ #define ERR_InterruptSET 0xEE /* interrupt from board was set */ #define ERR_MMLocalMemory 0xEF /* IIOP M/M local memory error */ #define ERR_MMBufferMemory 0xF0 /* IIOP M/M buffer memory error */ #define ERR_CHBufferMemory 0xF1 /* IIOP C/H buffer memory error */ #define ERR_AccessRequested 0xF2 /* access request already posted*/ #define ERR_CommTimer 0xF3 /* comm timer error */ #define ERR_ModemFailure 0xF4 /* modem read or write failure */ #define ERR_DMAFailure 0xF5 /* DMA read or write failure */ #define ERR_ChecksumFailure 0xF6 /* EEPROM checksum failure */ #define ERR_BoardShadowed 0xF7 /* board shadowed by other board*/ /*****************************************************************************/ /* */ /* this section defines the module ID numbers used for type */ /* */ /*****************************************************************************/ #define MID_DIStart 0x00 #define MID_DI0516 0x00 /* 5 V DC */ #define MID_DI0516C 0x01 /* 5 V DC w/4 counters */ #define MID_DI0532 0x02 /* 5 V DC */ #define MID_DI0532C 0x03 /* 5 V DC w/4 counters */ #define MID_DI2416 0x04 /* 24 V DC */ #define MID_DI2416C 0x05 /* 24 V DC w/4 counters */ #define MID_DI2432 0x06 /* 24 V DC */ #define MID_DI2432C 0x07 /* 24 V DC w/4 counters */ #define MID_DI11516 0x08 /* 115 V AC */ #define MID_DI11532 0x09 /* 115 V AC */ #define MID_DI23016 0x0A /* 230 V AC */ #define MID_DI23032 0x0B /* 230 V AC */ #define MID_DI4816 0x0C /* 48 V DC */ #define MID_DI4832 0x0E /* 48 V DC */ #define MID_DOStart 0x20 #define MID_DO0516 0x20 /* 5 V DC */ #define MID_DO0216 0x21 /* isolated universal DC */ #define MID_DO2416 0x22 /* 24 V DC */ #define MID_DO0216M 0x23 /* isolated universal DC (M) */ #define MID_DO11516 0x24 /* 115 V AC */ #define MID_DO11516M 0x25 /* 115 V AC w/monitoring */ #define MID_DO23016 0x26 /* 230 V AC */ #define MID_DO23016M 0x27 /* 230 V AC w/monitoring */ #define MID_DO0416 0x28 /* 120 V DC */ #define MID_DO0416M 0x29 /* 120 V DC w/monitoring */ #define MID_DO0016 0x2A /* universal DC */ #define MID_DO0016M 0x2B /* universal DC w/monitoring */ #define MID_DO0116 0x2C /* universal AC */ #define MID_DO0116M 0x2D /* universal AC w/monitoring */ #define MID_DO0316 0x2E /* H-Drive */ #define MID_AIStart 0x40 #define MID_AI0016 0x40 /* universal t/c */ #define MID_AI1508 0x41 /* high-level */ #define MID_AI1516 0x42 /* high-level */ #define MID_AI0008 0x43 /* universal t/c */ #define MID_AI0108 0x44 /* Ni/Pt RTD */ #define MID_AI0116 0x45 /* Ni/Pt RTD */ #define MID_AI0208 0x46 /* Cu RTD */ #define MID_AI0216 0x47 /* Cu RTD */ #define MID_AI0308 0x48 /* LVDT */ #define MID_AI0316 0x49 /* LVDT */ #define MID_AOStart 0x60 #define MID_AO42008 0x60 /* 4-20/0-20 mA */ #define MID_AO42016 0x61 /* 4-20/0-20 mA */ #define MID_COStart 0x80 #define MID_IC0032 0x80 /* 16AI/16AO w/Optomux Ctrlr */ #define MID_MC0032 0x81 /* 16AI/16AO w/o Optomux Ctrlr */ /*****************************************************************************/ /* */ /* this section defines the base ID numbers used for base type verification */ /* */ /* NOTE: bases higher than 9 are encoded in HEX and are to be converted to */ /* decimal when base type is displayed. */ /*****************************************************************************/ #define BID_TE00 0x00 /* modules without a base */ #define BID_TE01 0x01 /* DI: 08, 16, 32 */ #define BID_TE02 0x02 /* DI: 08, 16 */ #define BID_TE03 0x03 /* AO: 08, 16 */ #define BID_TE04 0x04 /* PS: */ #define BID_TE05 0x05 /* DO: 08, 16 */ #define BID_TE06 0x06 /* RTD: 08, 16 */ #define BID_TE07 0x07 /* AI: 08, 16 (only T/C) */ #define BID_TE08 0x08 /* AI: 08, 16 (no T/C) */ #define BID_TE09 0x09 /* DO: 08, 16 */ #define BID_TE10 0x0A /* LVDT: 08, 16 */ #define BID_TE11 0x0B /* H-Drive: 08, 16 */ /*****************************************************************************/ /* */ /* this section defines the interface ID numbers used for interface type */ /* verification */ /* */ /*****************************************************************************/ #define IID_415_PCAT 0xE0 #define IID_40P_SBX 0xE1 #define IID_443_VME 0xE2 #define IOP_PCAT 0x00E0 /* 415 (E0) - 00 Driver */ #define IOP_VVME 0x01E2 /* 443 (E2) - 01 Driver (VME Corp) */ #define IOP_RVME 0x02E2 /* 443 (E2) - 02 Driver (RadiSys) */ #define IOP_XVME 0x03E2 /* 443 (E2) - 03 Driver (XYCOM) */ /*****************************************************************************/ /* */ /* this section defines the comm times for the modules */ /* */ /* NOTE: - The times are defined in uSec (unless noted) */ /* - The times are based on actual communications times and */ /* the delay times MUST be added where appropiate. */ /* - All times are to be based on measurements from the IIOP */ /* - Mod_...._Tx times include addr+opc+sts+..data..+crc+crc */ /* - Mod_...._Rx times include addr+opc+..data..+crc+crc */ /* - all times MUST be divisible by 4 due to the 4 uSec resolution */ /* of the module timers. */ /* */ /*****************************************************************************/ #define TIM_Synch_Delay 500 /* B/C address to first Tx */ #define TIM_Mod_Tx_Delay 80 /* between each Tx to IIOP */ #define TIM_Mod_Tx_To_Rx_Delay 200 /* between last Tx and first Rx */ #define TIM_Mod_Rx_Delay 52 /* between each Tx to modules */ /* 5 * 32 + bytes * 32 */ #define TIM_Mod_16DI_Tx 224 /* 2 bytes DI */ #define TIM_Mod_16DI_4C_Tx 480 /* 8 bytes AI + 2 bytes DI */ #define TIM_Mod_32DI_Tx 288 /* 4 bytes DI */ #define TIM_Mod_32DI_4C_Tx 544 /* 8 bytes AI + 4 bytes DI */ #define TIM_Mod_16DO_Tx 224 /* 2 bytes DOR */ #define TIM_Mod_32DO_Tx 288 /* 4 bytes DOR */ #define TIM_Mod_8AI_Tx 672 /* 16 bytes AI */ #define TIM_Mod_16AI_Tx 1184 /* 32 bytes AI */ #define TIM_Mod_8AO_Tx 192 /* 1 byte AOR */ #define TIM_Mod_16AO_Tx 224 /* 2 bytes AOR */ #define TIM_Mod_8CO_Tx 224 /* 1 byte DI + 1 byte DOR */ #define TIM_Mod_16CO_Tx 288 /* 2 byte DI + 2 byte DOR */ /* 4 * 32 + bytes * 32 */ #define TIM_Mod_16DO_Rx 192 /* 2 bytes DO */ #define TIM_Mod_32DO_Rx 256 /* 4 bytes DO */ #define TIM_Mod_8AO_Rx 640 /* 16 bytes AO */ #define TIM_Mod_16AO_Rx 1152 /* 32 bytes AO */ #define TIM_Mod_8CO_Rx 160 /* 1 byte DO */ #define TIM_Mod_16CO_Rx 192 /* 2 byte DO */ /*****************************************************************************/ /* The following define the system opcodes of TransPort system */ /* */ /*****************************************************************************/ #define OPC_TestHWSW 0x01 #define OPC_TestNOP 0x00 #define OPC_TestCompletion 0x01 #define OPC_TestHWReset 0x02 #define OPC_TestPROMChkSum 0x03 #define OPC_TestEAROMChkSum 0x04 #define OPC_TestRamReadWrite 0x05 #define OPC_TestBitPattern 0x06 #define OPC_TestCalibrateMode 0x07 #define OPC_TestIdentifyMode 0x08 #define OPC_CnfgCtrl 0x02 #define OPC_CnfgNOP 0x00 #define OPC_CnfgResetBase 0x01 #define OPC_CnfgRecallEAROM 0x02 #define OPC_CnfgStoreEAROM 0x03 #define OPC_CnfgTxEAROM 0x04 #define OPC_CnfgRxEAROM 0x05 #define OPC_CnfgRxCommTimes 0x06 #define OPC_CnfgRxOnTimes 0x07 #define OPC_CnfgRxOffTimes 0x08 #define OPC_CnfgRxDeActivate 0x09 #define OPC_CnfgEnaDisTimers 0x0A #define OPC_CnfgRxNewAddress 0x0B #define OPC_CnfgTxRevNumbers 0x0C #define OPC_CnfgTxSerNumbers 0x0D #define OPC_CnfgTxModType 0x0E #define OPC_CnfgTxBaseType 0x0F #define OPC_CnfgTxEAROMBlockCRC 0x10 #define OPC_CnfgTxPROMBlockCRC 0x11 #define OPC_CnfgRxBlock 0x12 #define OPC_CnfgTxBlock 0x13 #define OPC_CnfgCheckModule 0x14 #define OPC_CnfgStoreCommTime 0x15 #define OPC_IIOPIntCtrl 0x03 #define OPC_IIOPNOP 0x00 #define OPC_IIOPChangeMode 0x01 #define OPC_IIOPValidateConfig 0x02 #define OPC_IIOPSetupSerialPort 0x03 #define OPC_IIOPStoreNOVRAM 0x04 #define OPC_IIOPRecallNOVRAM 0x05 #define OPC_IIOPClearNOVRAM 0x06 #define OPC_BlockMovCtrl 0x04 #define OPC_BlockNOP 0x00 #define OPC_BlockGetControlWord 0x01 #define OPC_BlockChgControlWord 0x02 #define OPC_BlockGetStatusWord 0x03 #define OPC_BlockChgStatusWord 0x04 #define OPC_BlockTxfrMsgBfr 0x05 #define OPC_BlockTxfrRspBfr 0x06 #define OPC_BlockTxfrCnfgTable 0x07 #define OPC_BlockTxfrScanList 0x08 #define OPC_BlockTxfrMemWindow 0x09 #define OPC_BlockTxfrDPRtoDPR 0x0A #define OPC_BlockTxfrDPRtoRAM 0x0B #define OPC_BlockTxfrRAMtoRAM 0x0C #define OPC_BlockTxfrRAMtoDPR 0x0D #define OPC_BlockTxfrIIOPStatus 0x0E #define OPC_BlockTxfrNVMtoDPR 0x0F #define OPC_BlockTxfrNVMtoRAM 0x10 #define OPC_MstrShipControl 0x05 #define OPC_MSCNOP 0x00 #define OPC_MSCRequestControl 0x01 #define OPC_MSCRequestStatus 0x02 #define OPC_MjrOpCode06H 0x06 #define OPC_MjrOpCode07H 0x07 #define OPC_MjrOpCode08H 0x08 #define OPC_MjrOpCode09H 0x09 #define OPC_TxCurrentStatus 0x0A #define OPC_TxRstSnglCount 0x0B #define OPC_TxRstAllCounts 0x0C #define OPC_ClrSnglLatch 0x0D #define OPC_ClrMulLatches 0x0E #define OPC_TxPeakData 0x0F #define OPC_TxValleyData 0x10 #define OPC_RstSnglPeak 0x11 #define OPC_RstMulPeak 0x12 #define OPC_RstSnglValley 0x13 #define OPC_RstMulValleys 0x14 #define OPC_RxPWMTimes 0x15 #define OPC_SystemNOP 0x80 #define OPC_SystemRestart 0x81 #define OPC_BCTxRxAll 0x82 #define OPC_InitiateDefaults 0x83 /*****************************************************************************/ /* The following are miscellaneous defines for the opcodes of the system */ /* */ /*****************************************************************************/ #define TPT_MasterToSlave 0x00 /* data from master to slave */ #define TPT_SlaveToMaster 0x01 /* data from slave to master */ #define TPT_FuncError 0xFFFF /* opcode does not support msg */ /* or rsp from/to host system */ /*****************************************************************************/ /* The following are defined for the system opcodes of TransPort system */ /* */ /*****************************************************************************/ /* */ /* SOM_ - the number of bytes required for the opcode message */ /* - length of 0000h indicates a variable length is valid */ /* SOR_ - the number of bytes required for the opcode response */ /* - length of 0000h indicates a variable length is valid */ /* */ /*****************************************************************************/ #define SOM_TestHWSW 0x0000 #define SOR_TestHWSW 0x0000 #define SOM_TestNOP 0x0003 #define SOR_TestNOP 0x0004 #define SOM_TestCompletion 0x0003 #define SOR_TestCompletion 0x0004 #define SOM_TestHWReset 0x0003 #define SOR_TestHWReset 0x0004 #define SOM_TestPROMChkSum 0x0003 #define SOR_TestPROMChkSum 0x0004 #define SOM_TestEAROMChkSum 0x0003 #define SOR_TestEAROMChkSum 0x0004 #define SOM_TestRamReadWrite 0x0003 #define SOR_TestRamReadWrite 0x0004 #define SOM_TestBitPattern 0x0005 #define SOR_TestBitPattern 0x0004 #define SOM_TestCalibrateMode 0x0004 #define SOR_TestCalibrateMode 0x0004 #define SOM_TestIdentifyMode 0x0004 #define SOR_TestIdentifyMode 0x0004 #define SOM_CnfgCtrl 0x0000 #define SOR_CnfgCtrl 0x0000 #define SOM_CnfgNOP 0x0003 #define SOR_CnfgNOP 0x0004 #define SOM_CnfgResetBase 0x0003 #define SOR_CnfgResetBase 0x0004 #define SOM_CnfgRecallEAROM 0x0003 #define SOR_CnfgRecallEAROM 0x0004 #define SOM_CnfgStoreEAROM 0x0003 #define SOR_CnfgStoreEAROM 0x0004 #define SOM_CnfgTxEAROM 0x0003 #define SOR_CnfgTxEAROM 0x0074 #define SOM_CnfgRxEAROM 0x0003 #define SOR_CnfgRxEAROM 0x0004 #define SOM_CnfgRxCommTimes 0x0003 #define SOR_CnfgRxCommTimes 0x0004 #define SOM_CnfgRxOnTimes 0x0005 #define SOR_CnfgRxOnTimes 0x0004 #define SOM_CnfgRxOffTimes 0x0005 #define SOR_CnfgRxOffTimes 0x0004 #define SOM_CnfgRxDeActivate 0x0004 #define SOR_CnfgRxDeActivate 0x0004 #define SOM_CnfgEnaDisTimers 0x0004 #define SOR_CnfgEnaDisTimers 0x0004 #define SOM_CnfgRxNewAddress 0x0004 #define SOR_CnfgRxNewAddress 0x0004 #define SOM_CnfgTxRevNumbers 0x0003 #define SOR_CnfgTxRevNumbers 0x0008 #define SOM_CnfgTxSerNumbers 0x0003 #define SOR_CnfgTxSerNumbers 0x000C #define SOM_CnfgTxModType 0x0003 #define SOR_CnfgTxModType 0x0006 #define SOM_CnfgTxBaseType 0x0003 #define SOR_CnfgTxBaseType 0x0006 #define SOM_CnfgTxEAROMBlockCRC 0x0003 #define SOR_CnfgTxEAROMBlockCRC 0x0006 #define SOM_CnfgTxPROMBlockCRC 0x0003 #define SOR_CnfgTxPROMBlockCRC 0x0006 #define SOM_CnfgRxBlock 0x0000 #define SOR_CnfgRxBlock 0x0004 #define SOM_CnfgTxBlock 0x0004 #define SOR_CnfgTxBlock 0x0000 #define SOM_CnfgCheckModule 0x0003 #define SOR_CnfgCheckModule 0x0074 #define SOM_CnfgStoreCommTime 0x0003 #define SOR_CnfgStoreCommTime 0x0004 #define SOM_IIOPIntCtrl 0x0000 #define SOR_IIOPIntCtrl 0x0000 #define SOM_IIOPNOP 0x0003 #define SOR_IIOPNOP 0x0004 #define SOM_IIOPChangeMode 0x0005 #define SOR_IIOPChangeMode 0x0004 #define SOM_IIOPValidateConfig 0x0003 #define SOR_IIOPValidateConfig 0x0004 #define SOM_IIOPSetupSerialPort 0x0003 #define SOR_IIOPSetupSerialPort 0x0004 #define SOM_IIOPStoreNOVRAM 0x0003 #define SOR_IIOPStoreNOVRAM 0x0004 #define SOM_IIOPRecallNOVRAM 0x0003 #define SOR_IIOPRecallNOVRAM 0x0004 #define SOM_IIOPClearNOVRAM 0x0003 #define SOR_IIOPClearNOVRAM 0x0004 #define SOM_BlockMovCtrl 0x0000 #define SOR_BlockMovCtrl 0x0000 #define SOM_BlockNOP 0x0003 #define SOR_BlockNOP 0x0004 #define SOM_BlockGetControlWord 0x0003 #define SOR_BlockGetControlWord 0x0006 #define SOM_BlockChgControlWord 0x0007 #define SOR_BlockChgControlWord 0x0004 #define SOM_BlockGetStatusWord 0x0003 #define SOR_BlockGetStatusWord 0x0006 #define SOM_BlockChgStatusWord 0x0007 #define SOR_BlockChgStatusWord 0x0004 #define SOM_BlockTxfrMsg 0x0000 #define SOR_BlockTxfrMsg 0x0004 #define SOM_BlockTxfrRsp 0x0003 #define SOR_BlockTxfrRsp 0x0000 #define SOM_BlockTxfrCnfgTable 0x0005 #define SOR_BlockTxfrCnfgTable 0x0000 #define SOM_BlockTxfrScanList 0x0004 #define SOR_BlockTxfrScanList 0x0000 #define SOM_BlockTxfrMemWindow 0x0008 #define SOR_BlockTxfrMemWindow 0x0004 #define SOM_BlockTxfrDPRtoDPR 0x000A #define SOR_BlockTxfrDPRtoDPR 0x0004 #define SOM_BlockTxfrDPRtoRAM 0x000A #define SOR_BlockTxfrDPRtoRAM 0x0004 #define SOM_BlockTxfrRAMtoRAM 0x000A #define SOR_BlockTxfrRAMtoRAM 0x0004 #define SOM_BlockTxfrRAMtoDPR 0x000A #define SOR_BlockTxfrRAMtoDPR 0x0004 #define SOM_BlockTxfrIIOPStatus 0x000E #define SOR_BlockTxfrIIOPStatus 0x0014 #define SOM_BlockTxfrNVMtoDPR 0x000A #define SOR_BlockTxfrNVMtoDPR 0x0004 #define SOM_BlockTxfrNVMtoRAM 0x000A #define SOR_BlockTxfrNVMtoRAM 0x0004 #define SOM_MstrShipControl 0x0000 #define SOR_MstrShipControl 0x0000 #define SOM_MSCNOP TPT_FuncError #define SOR_MSCNOP TPT_FuncError #define SOM_MSCRequestControl TPT_FuncError #define SOR_MSCRequestControl TPT_FuncError #define SOM_MSCRequestStatus TPT_FuncError #define SOR_MSCRequestStatus TPT_FuncError #define SOM_MjrOpCode06H TPT_FuncError #define SOR_MjrOpCode06H TPT_FuncError #define SOM_MjrOpCode07H TPT_FuncError #define SOR_MjrOpCode07H TPT_FuncError #define SOM_MjrOpCode08H TPT_FuncError #define SOR_MjrOpCode08H TPT_FuncError #define SOM_MjrOpCode09H TPT_FuncError #define SOR_MjrOpCode09H TPT_FuncError #define SOM_TxCurrentStatus 0x0002 #define SOR_TxCurrentStatus 0x0003 #define SOM_TxRstSnglCount 0x0003 #define SOR_TxRstSnglCount 0x0005 #define SOM_TxRstAllCounts 0x0002 #define SOR_TxRstAllCounts 0x0000 #define SOM_ClrSnglLatch 0x0003 #define SOR_ClrSnglLatch 0x0003 #define SOM_ClrMulLatches 0x0000 #define SOR_ClrMulLatches 0x0003 #define SOM_TxPeakData 0x0002 #define SOR_TxPeakData 0x0000 #define SOM_TxValleyData 0x0002 #define SOR_TxValleyData 0x0000 #define SOM_RstSnglPeak 0x0003 #define SOR_RstSnglPeak 0x0003 #define SOM_RstMulPeak 0x0002 #define SOR_RstMulPeak 0x0003 #define SOM_RstSnglValley 0x0003 #define SOR_RstSnglValley 0x0003 #define SOM_RstMulValleys 0x0002 #define SOR_RstMulValleys 0x0003 #define SOM_RxPWMTimes 0x0004 #define SOR_RxPWMTimes 0x0003 #define SOM_SystemNOP TPT_FuncError #define SOR_SystemNOP TPT_FuncError #define SOM_SystemRestart 0x0002 #define SOR_SystemRestart 0x0003 #define SOM_BCTxRxAll 0x0002 #define SOR_BCTxRxAll 0x0003 #define SOM_InitiateDefaults 0x0003 #define SOR_InitiateDefaults 0x0003 /*****************************************************************************/ /* The following are miscellaneous defines used for the opcodes */ /* */ /*****************************************************************************/ #define BIT_PowerUpDefaults 0x00 #define BIT_CommLossDefaults 0x01 /*****************************************************************************/ /* The following define the addresses of the IIOPs in the TransPort system */ /* */ /*****************************************************************************/ #define ADD_MasterIIOP 0x00 #define ADD_SystemDefault 0x79 #define ADD_PseudoMasterIIOP 0x7E #define ADD_SystemBroadcast 0x7F /*****************************************************************************/ /* The following define the modes of the IIOPs in the TransPort system */ /* */ /*****************************************************************************/ #define STT_NopMode 0x0000 #define STT_HaltMode 0x0001 #define STT_HostConfigMode 0x0004 #define STT_ExternConfigMode 0x0008 #define STT_BroadcastMode 0x0010 #define STT_ListenMode 0x0020 /*****************************************************************************/ /* The following define the modes of the IIOPs in the TransPort system */ /* but use a single byte for 8 bit operations (is bit position) */ /*****************************************************************************/ #define STB_NopMode 0x00 #define STB_HaltMode 0x01 #define STB_TuneMode 0x02 #define STB_HostConfigMode 0x03 #define STB_ExternConfigMode 0x04 #define STB_BroadcastMode 0x05 #define STB_ListenMode 0x06 /*****************************************************************************/ /* The following define the data types for the H-Drive I/O modules. */ /*****************************************************************************/ #define BIT_HDrive_ClearAll 0x03 #define BIT_HDrive_Brake 0x00 #define BIT_HDrive_Reset 0x01 #define BIT_HDrive_Forward 0x02 #define BIT_HDrive_Reverse 0x03 #define BIT_HDrive_DirBit 0x01 #define BIT_HDrive_DriveBit 0x02 #define BIT_HDriveSt_Brake 0x00 #define BIT_HDriveSt_OverI 0x01 #define BIT_HDriveSt_IMisMatch 0x02 #define BIT_HDriveSt_On 0x03 /*****************************************************************************/ /* The following define the OEM numbers of the TransPort systems */ /* */ /* The first 16 (10h) are defined for internal (or TPT) purposes. */ /*****************************************************************************/ #define OEM_TTISpecific 0x20 #define OEM_GECSpecific 0x30 #define OEM_DASSpecific 0x31 #define OEM_FNPSpecific 0x32 /*****************************************************************************/ /* */ /* this section defines the low level functions used to interface to */ /* the DPR from the PCAT, RadiSys, XYCOM or VME-Corp computers */ /* */ /*****************************************************************************/ #define BYT_MinBoardNum 1 #define BYT_MaxBoardNum 10 struct pcatboard { /* board structure for PCAT */ short segment; short port; char ctrlregmask; char accessflags; short accesstime; }; struct vvmeboard { /* board structure for VME Corp */ short upperaddr; char amcode; char accessflags; short segment; }; struct rvmeboard { /* board structure for RadiSys */ short upperaddr; char amcode; char addr31_24; char addr23_22; char addr21_16; char newamcode; char accessflags; short segment; }; struct xvmeboard { /* board structure for XYCOM */ short upperaddr; char amcode; char amcodeflag; char accessflags; char dummy; short segment; }; short inittbltpt(short brdnum, short segment, short ioport); short gethivertpt(short *version, char *date, short *boardtype); short getctltpt(short brdnum, short *dest); short setctltpt(short brdnum, short ctlbits); short getctlbtpt(short brdnum, short *dest, short bitmask); short setctlbtpt(short brdnum, short ctlmask, short bitstate); short getststpt(short brdnum, short *dest); short setststpt(short brdnum, short stsbits); short getstsbtpt(short brdnum, short *dest, short bitmask); short setstsbtpt(short brdnum, short stsmask, short bitstate); short rddtaltpt(short brdnum, short offst, char *dest, short amt); short wrdtaltpt(short brdnum, short offst, char *srce, short amt); short rddtautpt(short brdnum, short offst, char *dest, short amt); short wrdtautpt(short brdnum, short offst, char *srce, short amt); short opnacctpt(short brdnum); short clsacctpt(short brdnum); short chkopntpt(short brdnum); short rddtaotpt(short brdnum, short offst, char *dest, short amt); short wrdtaotpt(short brdnum, short offst, char *srce, short amt); short reqacctpt(short brdnum); short chkacctpt(short brdnum); short chkinttpt(short brdnum); short restarttpt(short brdnum); short sethitotpt(short brdnum, short newtimeout); short gethisegtpt(short board, short *segment); short sethisegtpt(short board, short segment); void *gethibrdptrtpt(void); #endif /* end of 'TPT_LL_System' */