Consider the Host Bus Characteristics

Before you install the board, you may need to set DIP switch SW1, which controls FPGA configuration, based on the characteristics of your host bus. Therefore, you will need to consider the following before you begin installation:

• FLASH memory write protect/write enable
• FLASH memory V_PP
• Select boot configuration at power on
• PCIe clock select
• P16 Clock select
• JTAG source select

For example, Switch SW1−5 allows you to change the PCIe clock from the XMC P15 clock (the factory default) to the on−board clock. For more information, refer to DIP Switch Settings.

This board is shipped to boot with the Gen 3 x8 PCIe default FPGA code.