Kintex UltraScale FPGA

The Model 71861 XMC features a Xilinx Kintex UltraScale FPGA for signal interfaces and processing. The FPGA is pre−configured by Pentek to provide signal acquisition buffering functions. This FPGA also provides board interfaces including PCIe and XMC.

The following Kintex UltraScale FPGAs are available for Model 71861: KU035, KU060, and KU115. The KU115 features 5520 DSP48E2 slices and is ideal for modulation/demodulation, encoding/decoding, encryption/decryption, and channelization of the signals between transmission and reception. For applications not requiring large DSP resources or logic, a lower−cost FPGA can be installed.

Custom, general−purpose I/O connections are provided to the FPGA through the optional PMC P14 connector (Option 104). Custom gigabit serial interfaces may be implemented through the optional XMC P16 connector (Option 105).

The Model 71861 XMC includes five gigabytes of DDR4 (Double Data Rate 4th Generation) SDRAM. This memory is controlled by the FPGA and is available as a memory resource for custom FPGA applications.

Model 71861 is shipped with a default FPGA configuration on FLASH memory, which is loaded at power−up. Up to four FPGA configurations can be stored in FLASH, identified as Version 0, Version 1, Version 2, and Version 3. The Pentek default FPGA con− figuration is located in the Version 0 space. The other three positions are empty.

The Pentek default FPGA configuration sets the PCIe interface to Gen 3 x8. However, the board can negotiate down to Gen 2 or Gen 1 x4, as needed.

The Pentek Navigator FPGA Design Kit (FDK) facilitates integration of user−created IP with the factory−shipped functions. See Description of Software.