A/D Acquisition

The 71861 features four blocks of A/D Acquisition IP Core modules for capturing and moving data. Each block of IP modules can receive data from any of the four A/Ds or from a test signal generator.

Each block of IP modules includes a DMA IP module for easily moving A/D data through the PCIe interface. Each powerful linked−list DMA module is capable of a unique Acquisition Gate Driven mode. In this mode, the length of a transfer performed by a link definition need not be known prior to data acquisition; rather, it is governed by the length of the acquisition gate. This is extremely useful in applications where an external gate drives acquisition and the exact length of that gate is not known or is likely to vary.

For each transfer, the DMA module can automatically construct metadata packets containing A/D channel ID, a sample−accurate time stamp and data length information. These actions simplify the host processor’s job of identifying and executing on the data.